FIG. 1 depicts a dual-channel circuit 20 capable of delivering a differential voltage to a pixel 24, of a liquid crystal display (LCD), having a switch S1 and a liquid crystal modeled as a capacitor C. The multi-channel circuit 20 includes a backplane amplification circuit 28 to deliver a backplane signal VCOM to a backplane electrode 36 of the pixel 24, and a video amplification circuit 32 to deliver a video signal VOUT to a video electrode 40 of the pixel 24. The backplane and video electrodes 36, 40 both typically have time-varying voltage requirements over the course of operation of the LCD.
FIG. 2 depicts an implementation of the dual-channel circuit 20A, in which an embodiment of the backplane amplification circuit 28A includes a first digital-to-analog converter (DAC) 44 configured to receive a first digital input DIN1, and an embodiment of the video amplification circuit 32A includes a second DAC 48 configured to receive a second digital input DIN2. In FIG. 2, the first and second DACs 44, 48 each have a plurality of resistors 38, 42 arranged in series and configured to receive first and second reference voltages VREF1, VREF2, respectively. Intermediate voltages VSEL1, VSEL2 are selected from the resistor strings by a plurality of switches 46, 50 in response to the first and second digital inputs DIN1, DIN2. The selected voltages VSEL1, VSEL2 are buffered, and optionally amplified, by output amplifiers 52, 56 to produce the backplane and video signals VCOM, VOUT.
An ideal differential-to-single-ended amplifier typically implements a transfer function that can represented by VOA=(VIA+−VIA−)*GA, where VOA is the voltage produced at an output terminal, VIA+ and VIA− are voltages received at non-inverting and inverting input terminals, respectively, and GA is the gain of the ideal amplifier. The ideal amplifier would therefore produce a zero value of the output voltage VOA in response to a zero value of the differential input voltage, VIA+−VIA−. However, as a practical reality, most amplifiers have small imperfections such as, e.g., slightly differently-sized transistors on either side of a differential signal path, which imbalance the operation of the amplifier, resulting in a non-zero value of the differential input voltage (VIA+−VIA−), known as the input-referred offset voltage VOS, being required to produce a zero value of the output voltage VOA. The input-referred offset voltage VOS can manifest itself as the voltage difference between the inverting and non-inverting input terminals of a non-ideal amplifier when it is configured to operate in a negative feedback loop.
Returning to FIG. 2, the depicted output amplifiers 52, 56 represent ideal amplifiers, and associated input-referred offset voltages VOS1, VOS2, are depicted as voltage supplies VOS1, VOS2 connected to the respective inverting input terminals. Due to the unity-gain negative-feedback configuration of the output amplifiers 52, 56, the first and second input-referred offset voltages VOS1, VOS2 will also be reflected at the output terminals of the amplifiers 52, 56. Thus, the differential pixel voltage VPIX, i.e., VOUT−VCOM, can be represented as follows: VPIX=VOUT−VCOM=(VSEL2+VOS2)−(VSEL1+VOS1).
One problem, however, associated with the operation of the dual-channel circuit 20A of FIG. 2 is that the pixel voltage VPIX therefore has a limited accuracy. The pixel voltage VPIX includes a first, intentional component (VSEL2−VSEL1) and a second, unintentional component (VOS2−VOS1). However, the first and second offset voltages VOS1, VOS2 are not typically the same, or even correlated, and have values that are not necessarily known in advance of manufacture of the circuit. Thus, the accuracy of the pixel voltage VPIX, i.e., how close in value it comes to the intended component (VSEL2−VSEL1), delivered by the circuit 20A of FIG. 2 is limited because the value of the unintentional component (VOS2−VOS1) is uncertain.
Note that, although the embodiment of FIG. 2 includes particular DAC configurations, other types of video and backplane DAC configurations, and even other dual-channel architectures (i.e., not necessarily involving DACs), are also possible, and can suffer from limited accuracy due to the presence of input-referred offset voltages and related symptoms.